A conventional hybrid integrated circuit device includes an insulating substrate and electronic components mounted on the upper surface and/or lower surface of the substrate. To mount such a hybrid integrated circuit device to a motherboard or other kinds of circuit boards, use is made of a plurality of clip terminals soldered to each end of the insulating substrate at a predetermined pitch along the end.
Each of the clip terminals comprises a wire whose end is bent into a clip. In addition to being used for receiving the clip terminals, the ends of the insulating substrate are formed with a plurality of electrodes arranged at a predetermined pitch to be connected to a wiring pattern for electrically connecting the clip terminals to the electronic components mounted on the insulating substrate. Each of the clip terminals is clipped to the end of the insulating substrate and then secured to the substrate by soldering.
In recent years, an increasing number of electronic components are incorporated into hybrid integrated circuit devices. At the same time, there are demands for reducing the size of a hybrid integrated circuit device. In the conventional hybrid integrated circuit device described above, a certain amount of area needs to be kept for soldering the clip terminals at the ends of the insulating substrate. Thus, the area that can be used for mounting electronic components is reduced, which makes it difficult to meet the above demands for a hybrid integrated circuit device. Conventionally, to overcome this difficulty, various terminal structures of a hybrid integrated circuit device have been proposed for increasing the number of electronic components without increasing the size of the insulating substrate.
For instance, in the terminal structure disclosed in Patent Document 1 below, the clip terminals are replaced with prism-shaped, insulating members which are bonded to a region (a lower region) of the ends (corresponding to the ends used for mounting the clip terminals) of the insulating substrate in a horizontally extending manner, each insulating member having an outer surface formed with terminal electrodes that correspond to the clip terminals. With this arrangement, the area for mounting electronic components on the other surface (the upper surface) of the insulating substrate is increased.
FIGS. 13-15 show the terminal structure of a hybrid integrated circuit device disclosed in Patent Document 1.
The hybrid integrated circuit device includes an insulating substrate 11 having an upper and a lower surfaces on which a plurality of electronic components 13 are mounted. Wiring patterns 14 (see FIG. 15) for the electronic components 13 are formed at the ends of the lower surface of the insulating substrate 11. The wiring patterns 14 are arranged at a predetermined pitch P along each of the side surfaces 11a of the insulating substrate 11. Legs 12 each comprising an insulating member in the form of a bar having a rectangular cross section are mounted to the ends of the lower surface of the insulating substrate 11 to extend horizontally (i.e., the longitudinal side extends in parallel with the surface of the insulating substrate 11).
A plurality of grooves 15 are formed at the outwardly-oriented side surface (hereinafter referred to as “outer side surface”) of each of the legs 12. The grooves 5 are arranged at the pitch P in the longitudinal direction of the leg 12. A terminal electrode 16 is formed in each of the grooves 15. Each of the terminal electrodes 16 is electrically connected to the wiring pattern 14 formed on the lower surface of the insulating substrate 11. The hybrid integrated circuit device is mounted on a circuit board such as a motherboard by soldering each of the terminal electrodes 16 onto a wiring pattern formed on the circuit board.
With this structure of the hybrid integrated circuit device, it is unnecessary to secure the soldering area for connecting terminals such as clip terminals at the ends of the upper surface of the insulating substrate 11. Thus, the area for mounting electronic components 13 is relatively large, so that a relatively large number of electronic components 13 can be mounted.
The Patent Document 1 also discloses a method for forming a plurality of terminal electrodes 16 on an outer side surface of each leg 12.
The method proceeds as follows:
(1) A material board large enough to provide a plurality of insulating substrates 11 arranged side by side is prepared;
(2) A leg material having a width corresponding to two legs is bonded to the lower surface of the material board along each boundary line between adjacent insulating substrates 11;
(3) A plurality of through-holes are formed in the leg material at a predetermined pitch P along the boundary line, and the inner surface of each through-hole is plated with an electroconductive material to provide a via hole. Wiring patterns 14 are formed in advance on the insulating substrate 11 at locations at which the via holes are to be formed. Thus, each of the via holes is electrically connected to the wiring pattern 14; and
(4) The material board to which the leg material is bonded is cut along the boundary lines.
In the process (4), when the material board to which the leg material is bonded is cut, each of the via holes is divided into two parts. As a result, the divided surface forms a semicircular groove 15, and the conductor plated in the groove 15 appears as a terminal electrode 16.
Patent Document 1: JP-A-2004-172422